**Summary:** Facebook is hiring ASIC Design Engineers within our Infrastructure organization. We are looking for experienced individuals with knowledge that span one or more of the key areas required to build successful complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design Responsibilities: 1. Develop and design silicon debugging infrastructure and infrastructure for our silicon products 2. Identify and analyze deficiencies in current silicon debugging infrastructure, and propose enhancements for improvement 3. Assess new features from a Design for Debug (DFD) perspective to improve debuggability 4. Work closely with software, architecture, design, verification, and silicon validation teams 5. Create highly optimized and parameterized modules/designs for reuse across multiple silicon products 6. Collaborate with the Design Verification (DV) team to verify DFD hardware at the full-chip level 7. Provide training and mentorship to team members in silicon debugging **Minimum Qualifications:** Minimum Qualifications: 8. 13+ years of hands-on experience. Design for Debug (DFD) expert 9. Proficient in working with silicon debug infrastructure IPs such as Coresight, UltraSoc, Ultrasight, or similar 10. Experience in RTL development (Verilog), with a focus on arbiters, scheduling, synchronization, bus protocols, and interconnect networks 11. In-depth understanding of the ASIC design flow, including RTL design, verification, synthesis, timing analysis, and bring-up 12. Extensive experience working with silicon validation teams for post-silicon debugging **Preferred Qualifications:** Preferred Qualifications: 13. uArch design experience for complex IPs 14. Scripting and automation skills **Industry:** Internet